Digital Trainer Features:
Digital Trainer is intended for elementary as well as advance training of Digital electronics and for bread board digital circuits, AND, OR, NOT, NAND, NOR, XOR, Three State Buffer, RS Latch, JK Flip Flop, Monostable Multibrator. and UP/ DOWN Counter.Practical experience on this board carries great educative value for R & D labs, Science and Engineering Students.
01. Breadboard : Solderless Bread board with 1680 inter connected
02. Pulse Switches : 2 No’s. Bounce free push buttons
03. Logic Switches : 8 logic level Switches in Dip type .
04. Power Supply : Fixed: +5V at 750 mA
05. Power Sockets : Logic Probe Power Supply Sockets
06. Logic Input : 8 LED buffered logic level indicators
07. Variable Clock : Fine adjustment of clock frequency.
Clock range selection L: 10 – 40 Hz, H : 1K – 20K Hz.
08. Jacks : 2mm to BNC Socket 2 No. 2mm to 4mm Socket 2 No.
09. Components Provided : ICs - 4001/1, 7400/3, 7402/1, 7404/1, 7408/1,
7432/1, 7476/2, 7486/1, 74126/1, Resistors 1/4W
±5% 230E/1, 10K/1, 39K/1, LED 5mm/1
10. Accessories : Mains cord, 2mm Red & Black patch cords 5 each and 2mm to 1mm Red & Black 5 each
11. Instruction manual : Strongly supported by detailed operating instructions.
12. Logic Probe Omega Type LP-002 With 2mm Banana Pin Qt.1 Provided
- Wiring of all types of experiments become simple and less time consuming.
- The unit is operative on 230V ±10% at 50Hz AC Mains.
- Weight : 3 Kg. (Approx.)
- Dimension : W 340 x H 110 x D 210
1. LED Display 2. Getting a Pulse
3. Setting a Logic Level 4. Getting a Clock and using the Logic Probe
5. AND Gate (static operation) 6. OR Gate (static operation)
7. Dynamic Operation of AND Gate and OR Gate 8. NOT Gate
9. NAND Gate 10. NOR Gate
11. Exclusive OR Gate (Also called XOR Gate) 12. XNOR
13. Three State Buffer 14. RS Latch
15. Basic JK Flip Flop 16. Monostable Multivibrator
17. Asynchronous UP/DOWN Counter
Specifications of Logic Probe Order Code - 16905
01. OPERATING VOLTAGE : 5V ± 3% regulated DC at 150mA, Ripple < 3mV.
02. LOGIC STATE INDICATIONS
01. High Level '1' : 'H' (HIGH).
02. Lo w Level '0' : 'L' (LOW).
03. Open / Floating state : 'O' (OPEN).
04. Pulses : 'P' (PULSES).
03. LOGIC FAMILIES : TTL / CMOS.
04. FREQUENCY : Upto 50MHz for TTL/CMOS.
05. RECOGNISED VOLTAGE LEVELS BY LOGIC PROBE AT
AN OPERATING VOLTAGE OF 5V ±3% RIPPLE < 3mV
01. High Level Threshold : > 3.0V
02. Low Level Threshold : < 0.8V
03. Open/Floating Level : 0.8V to 3.0V (Approx.)
04. Over Load Protection : Upto 25V source
05. Sink Current : Less than 15mA
06. SUPPLY CURRENT TAKEN
BY THE PROBE : Less than 150mA
07. SHORTEST PULSE WHICH CAN
BE DETECTED BY THE PROBE : 40 nano Sec.
08. Pulse detection is retriggerable and hence continuous pulses or clock will be indicated by 'P'.
09. Positive going pulse will be indicated by letter 'L' followed by letter 'P' and then 'L' again.
10. Negative going pulse will be indicated by the letter 'H' followed by letter 'P' and then 'H' again.
11. THE INDICATOR 'O' OCCURS IN TWO SITUATIONS
01. When the probe tip is not connected to a test point
02. When the test point is floating with a level lying between about 0.8V to 3V